SLAS787 datasheet(13/52 Pages) TI2

13 / 52 page

MSP430G2231-Q1

www.ti.com

SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014

8.8.5 Timer_A2

Timer_A2 is a 16-bit timer/counter with two capture/compare registers. Timer_A2 can support multiple

capture/compares, PWM outputs, and interval timing. Timer_A2 also has extensive interrupt capabilities.

Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare

registers.

Table 10. Timer_A2 Signal Connections – Device With ADC10

INPUT PIN NUMBER

MODULE

OUTPUT PIN NUMBER

DEVICE INPUT

MODULE

OUTPUT

SIGNAL

INPUT NAME

BLOCK

RSA

SIGNAL

2 - P1.0

1 - P1.0

TACLK

ACLK

Timer

SMCLK

2 - P1.0

1 - P1.0

TACLK

INCLK

3 - P1.1

2 - P1.1

TA0

CCI0A

3 - P1.1

2 - P1.1

ACLK (internal)

CCI0B

7 - P1.5

6 - P1.5

CCR0

TA0

VSS

GND

VCC

4 - P1.2

3 - P1.2

TA1

CCI1A

4 - P1.2

3 - P1.2

8 - P1.6

7 - P1.6

TA1

CCI1B

8 - P1.6

7 - P1.6

CCR1

TA1

VSS

GND

13 - P2.6

12 - P2.6

VCC

8.8.6 USI

The universal serial interface (USI) module is used for serial data communication and provides the basic

hardware for synchronous communication protocols like SPI and I2C.

8.8.7 ADC10

The ADC10 module supports fast, 10-bit analog-to-digital conversions. The module implements a 10-bit SAR

core, sample select control, reference generator and data transfer controller, or DTC, for automatic conversion

result handling, allowing ADC samples to be converted and stored without any CPU intervention.

Submit Documentation Feedback

Product Folder Links: MSP430G2231-Q1

SLAS787 Datasheet(PDF) 13 Page - Texas Instruments

SLAS787 Datasheet(HTML) 13 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL