SLAS787 datasheet(11/52 Pages) TI2

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MSP430G2231-Q1

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SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014

8.6 Memory Organization

Table 8. Memory Organization

MSP430G2231

Memory

Size

2KB

Main: interrupt vector

Flash

0xFFFF to 0xFFC0

Main: code memory

Flash

0xFFFF to 0xF800

Information memory

Size

256 Byte

Flash

010FFh to 01000h

RAM

Size

128B

027Fh to 0200h

Peripherals

16-bit

01FFh to 0100h

8-bit

0FFh to 010h

8-bit SFR

0Fh to 00h

8.7 Flash Memory

The flash memory can be programmed using the Spy-Bi-Wire or JTAG port or in-system by the CPU. The CPU

can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:

•

Flash memory has n segments of main memory and four segments of information memory (A to D) of

64 bytes each. Each segment in main memory is 512 bytes in size.

•

Segments 0 to n may be erased in one step, or each segment may be individually erased.

•

Segments A to D can be erased individually or as a group with segments 0 to n. Segments A to D are also

called information memory.

•

Segment A contains calibration data. After reset segment A is protected against programming and erasing. It

can be unlocked but care should be taken not to erase this segment if the device-specific calibration data is

required.

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