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STM32L151VD Datasheet(PDF) 91 Page - STMicroelectronics |
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STM32L151VD Datasheet(HTML) 91 Page - STMicroelectronics |
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91 / 154 page  DocID022027 Rev 11 91/154 STM32L151xD STM32L152xD Electrical characteristics 129 Figure 20. Asynchronous multiplexed PSRAM/NOR read waveforms Table 38. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1) 1. CL = 30 pF. Symbol Parameter Min Max Unit tw(NE) FSMC_NE low time 2*THCLK -3 2*THCLK +2 ns tv(NWE_NE) FSMC_NEx low to FSMC_NWE low 0.5 1 ns tw(NWE) FSMC_NWE low time THCLK - 2 THCLK + 3 ns th(NE_NWE) FSMC_NWE high to FSMC_NE high hold time THCLK - 2.5 - ns tv(A_NE) FSMC_NEx low to FSMC_A valid - 0 ns th(A_NWE) Address hold time after FSMC_NWE high THCLK - 2.5 - ns tv(BL_NE) FSMC_NEx low to FSMC_BL valid - 0 ns th(BL_NWE) FSMC_BL hold time after FSMC_NWE high THCLK - 4 - ns tv(Data_NE) FSMC_NEx low to Data valid - THCLK ns th(Data_NWE) Data hold time after FSMC_NWE high THCLK - 2.5 - ns |
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