SPC560D30X datasheet(10/82 Pages) STMICROELECTRONICS

10 / 82 page

Package pinouts and signal descriptions

SPC560D30x, SPC560D40x

10/82

DS6494 Rev 8

Figure 3 shows the SPC560D30x and SPC560D40x in the LQFP64 package.

Figure 3. LQFP64 LQFP pin configuration (top view)

3.2

Pad configuration during reset phases

All pads have a fixed configuration under reset.

During the power-up phase, all pads are forced to tristate.

After power-up phase, all pads are forced to tristate with the following exceptions:



PA[9] (FAB) is pull-down. Without external strong pull-up the device starts fetching from

flash.



PA[8] (ABS[0]) is pull-up.



RESET pad is driven low. This is pull-up only after PHASE2 reset completion.



JTAG pads (TCK, TMS and TDI) are pull-up while TDO remains tristate.



Precise ADC pads (PB[7:4] and PD[11:0]) are left tristate (no output buffer available).



Main oscillator pads (EXTAL, XTAL) are tristate.

3.3

Voltage supply pins

Voltage supply pins are used to provide power to the device. Two dedicated pins are used

for 1.2 V regulator stabilization.

PB[3]

PC[9]

PA[2]

PA[1]

PA[0]

VSS_HV

VDD_HV

VSS_HV

RESET

VSS_LV

VDD_LV

VDD_BV

PC[10]

PB[0]

PB[1]

PC[6]

PA[11]

PA[10]

PA[9]

PA[8]

PA[7]

PA[3]

PB[15]

PB[14]

PB[13]

PB[12]

PB[11]

PB[7]

PB[6]

PB[5]

VDD_HV_ADC

VSS_HV_ADC

LQFP64

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