PIN FUNCTIONS

Pin #

Name

Function

1

CRlatch

A rising edge latches the information present into the control register

2, 5, 6, 8, 9,

11, 12, 14,

16, 18, 19,

21, 22, 24,

25, 28

Output 15...0

High side DMOS outputs. To be active, Short Pulse and/or Long Pulse and Nozzle

Check Enable must have a low level

3, 7, 10, 13,

17, 20, 23,

26

Vc

Outputs Power Supply

4, 15, 27,

51, 79, 92

GND

logic and power ground

29

Latch Clear

A high level resets all bit in the latch

1

2

3

5

6

4

7

8

9

10

36

11

37 38 39 40 41

95 94 93 92

90

91

89 88 87 86 85

70

69

68

66

65

67

75

74

73

71

72

OUTPUT13

OUTPUT14

POWGND

OUTPUT15

CRLATCH

OUTPUT10

OUTPUT11

VC

OUTPUT12

HSA4

HSA5

HSA6

HSA8

HSA9

HSA7

ENLC

GND

HSA1

HSA3

HSA2

D97IN489B

96

97

98

99

100

31 32 33 34 35

64

63

61

60

62

HSA10

HSA11

HSA13

HSA12

12

13

14

15

16

OUTPUT7

POWGND

OUTPUT8

OUTPUT9

17

18

19

20

OUTPUT5

OUTPUT6

21

22

23

24

25

OUTPUT1

OUTPUT2

OUTPUT4

OUTPUT3

59

57

56

58

HSB13

HSB11

HSB10

HSB12

HSB9

HSB8

HSB6

HSB5

HSB7

45 46 47 48 49 50

84 83

81

82

42 43 44

26

27

28

29

30

NCEN

LATCH_CLEAR

OUTPUT0

POWGND

55

54

52

51

53

HSB4

HSB3

HSB1

GND

HSB2

80

79

78

76

77

PIN CONNECTION (Top view)

L6452

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