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CY22K7
Document #: 38-07333 Rev. OBS
Page 9 of 12
Notes:
9.
CPUCLK on and CPUCLK off latency is 2 or 3 CPUCLK cycles.
10. CPU_STOP may be applied asynchronously. It is synchronized internally.
11. USB, USB/IO, REF are not synchronized when entering/leaving power-down.
Switching Waveforms (continued)
CPU_STOP Timing
CPUCLK
(Internal)
PCICLK
(Internal)
PCICLK
(Free-Running)
CPU_STOP
CPU, CPU/2, AGP
(External)
[9,10]
PCI_STOP
CPUCLK
(Internal)
PCICLK
(Internal)
PCICLK
PCI_STOP
PCICLK
(External)
(Free-Running)
PWR_DOWN
CPUCLK
(Internal)
PCICLK
(Internal)
PWR_DWN
PCICLK
CPUCLK
(External)
(External)
VCO
Crystal
Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock.
[11]
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