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TMS320DM647 Datasheet(PDF) 64 Page - Texas Instruments

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Part # TMS320DM647
Description  Digital Media Processor
PDF  182 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320DM647 Datasheet(HTML) 64 Page - Texas Instruments

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1
0
DIVIDERD4
CLKIN1
PLLEN(PLLCTL.[0])
SYSCLK1
SYSCLK2
AECLKIN(ExternalEMIFClockInput)
EMIFA
DIVIDERPREDIV
DIVIDERD1
DIVIDERD2
AECLKOUT
PLLV1
C2
C1
EMIFilter
+1.8V
560pF 0.1 F
SYSCLK5
SYSREFCLK
(C64x+MegaModule)
DIVIDERD5
PLL1Controller
(EMIFInputClock)
/1,/2,/3
ENA
PREDEN(PREDIV.[15])
/3
ENA
/2,/4,
.../8
PLL1
PLLM
x1,x15,
x20,x25,
x30,x32
D4EN(PLLDIV4.[15])
SYSCLK4
(Internal
EMIFClock
Input)
SYSCLK5
SYSCLK3
DIVIDERD3
/6
SYSCLK6
DIVIDERD6
ENA
D2EN(PLLDIV2.[15])
/1,/2,
...,/8
(EmulationandTrace)
VICP cop_clk/2
VICP cop_clk
/4
/2
01
AECLKINSEL
(AEA[17]pin)
10
VCLK
VLYNQ
CLKDIR
(CTRL.[15])
/1,/2,
...,/8
CLKDIV
(CTRL.[18:16])
/2
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372B – MAY 2007 – REVISED APRIL 2008
www.ti.com
Figure 6-5. PLL Input Clock
As shown in Figure 6-5, the PLL1 controller features a software-programmable PLL multiplier controller
(PLLM) and five dividers (PREDIV, D1, D2, D3, D4, D5, D6). The PLL1 controller uses the device input
clock CLKIN1 to generate a system reference clock (SYSREFCLK) and five system clocks (SYSCLK1,
SYSCLK2, SYSCLK3, SYSCLK4, SYSCLK5 and SYSCLK6). PLL1 power is supplied externally via the
PLL1 power-supply pin (PLLV1). An external EMI filter circuit must be added to PLLV1. The 1.8-V supply
of the EMI filter must be from the same 1.8-V power plane supplying the I/O power-supply pin, DVDD18. TI
requires EMI filter manufacturer Murata, part number NFM18CC222R1C3.
Peripheral Information and Electrical Specifications
64
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