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AS1170 Datasheet(PDF) 31 Page - ams-OSRAM AG |
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AS1170 Datasheet(HTML) 31 Page - ams-OSRAM AG |
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31 / 53 page ![]() AS1170 Detailed description Datasheet • PUBLIC • Document Feedback DS001083 • v2-00 • 2024-Feb-05 31 / 53 / Figure 28: Data transfer on I²C serial bus Depending upon the state of the R/W bit, two types of data transfer are possible: 1. Data transfer from a master transmitter to a slave receiver: The first byte transmitted by the master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received byte. Data is transferred with the most significant bit (MSB) first. 2. Data transfer from a slave transmitter to a master receiver: The master transmits the first byte (the slave address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not released. Data is transferred with the most significant bit (MSB) first. |
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