AS1170 datasheet(21/53 Pages) AMSOSRAM

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AS1170

Detailed description

Datasheet

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DS001083

• v2-00 • 2024-Feb-05

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Figure 19: Device shutdown and wakeup

In shutdown mode once pin SCL goes high for the first time, the internal counter shown in

Figure 20 is immediately reset thus releasing the internal RESET (assuming VIN is above

VUVLO) signal and allows instant communication on the I²C bus. Therefore, no additional action

is required to leave the shutdown mode and start I²C communication.

Purpose of this circuit

The purpose of this circuit is an additional security mechanism.

Assume the user indicator operation (there is no timeout for these operating modes) and the

battery slowly drops below the undervoltage limit of the system. The processor would get a

reset by the PMIC and the LDO operating VDD_I/F is switched off, but the processor might not

have been able to switch-off the indicator operation of the AS1170. Due to the implemented

security mechanism the AS1170 detects a power off of VDD_I/F and automatically enters

shutdown.

7.5.5

Current consumption in standby/shutdown mode

The AS1170 is designed to draw minimum current in standby and shutdown mode. There is a

small difference in current consumption between these two operating modes (typ. 300 nA) only

due to the internal level shifters (see the Schmitt trigger input buffers connected to SCL and

SDA for shifting up the voltage on SCL/SDA (VDD_I/F e.g. 1.8 V) to the supply voltage on VIN

(e.g. 3.7 V). If the AS1170 is driven with digital levels close to 0 V/VIN, the current consumption

for standby mode is identical to shutdown mode.

AS1170 Datasheet(PDF) 21 Page - ams-OSRAM AG