MPC852T datasheet(38/80 Pages) FREESCALE

38 / 80 page

MPC852T PowerQUICC™ Hardware Specifications, Rev. 4

Freescale Semiconductor

Bus Signal Timing

Table 12 shows the PCMCIA port timing for the MPC852T.

Figure 29 provides the PCMCIA output port timing for the MPC852T.

Figure 29. PCMCIA Output Port Timing

Figure 30 provides the PCMCIA output port timing for the MPC852T.

Figure 30. PCMCIA Input Port Timing

Table 12. PCMCIA Port Timing

Num

Characteristic

33 MHz

40 MHz

50 MHz

66 MHz

Unit

Min

Max

Min

Max

Min

Max

Min

Max

J95

CLKOUT to OPx Valid

(MAX = 0.00

× B1 + 19.00)

—

19.00

—

19.00

—

19.00

—

19.00

J96

HRESET negated to OPx drive1

(MIN = 0.75

× B1 + 3.00)

1 OP2 and OP3 only.

25.70

—

21.70

—

18.00

—

14.40

—

J97

IP_Xx valid to CLKOUT rising edge

(MIN = 0.00

× B1 + 5.00)

5.00

—

5.00

—

5.00

—

5.00

—

J98

CLKOUT rising edge to IP_Xx invalid

(MIN = 0.00

× B1 + 1.00)

1.00

—

1.00

—

1.00

—

1.00

—

CLKOUT

HRESET

Output

Signals

OP2, OP3

P57

P58

CLKOUT

Input

Signals

P59

P60

MPC852T Datasheet(PDF) 38 Page - Freescale Semiconductor, Inc

MPC852T Datasheet(HTML) 38 Page - Freescale Semiconductor, Inc

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