STDVE001A datasheet(18/49 Pages) STMICROELECTRONICS

18 / 49 page

Functional description

STDVE001A

18/49

3.7

Bias

The bandgap reference voltage over the external REXT reference resistor sets the internal

bias reference current. This current and its factors (achieved by employing highly accurate

and well matched current mirror circuit topologies) are generated on-chip and used by

several internal modules. The 10 mA current used by the transmitter block is also generated

using this reference current. It is important to ensure that the REXT value is within the ±1%

tolerance range of its typical value.

The output voltage swing depends on 3 components: supply voltage (Vsupply), termination

resistor (RT) and current drive (Idrive). The supply voltage can vary from 3.3 V ±5%,

termination resistor can vary from 50

Ω ±10%.

The voltage on the output is given by:

Vsupply −Idrive x RT.

The variation on Idrive must be controlled to ensure that the voltage on HDMI output is within

the HDMI specification under all conditions.

This is achieved when:

400 mV

≤Idrive x RT ≤600 mV with typical value centered at 500 mV.

3.8

Timing between HPD and DDC

It is important to ensure that the I2C DDC interface is ready by the time the HPD detection is

complete.

As soon as the discovery is finished by the HPD detection, the configuration data is

exchanged between a source and sink through the I2C DDC interface. The STDVE003 Afs

DDC interface is ready for communication as soon as the power supply to the chip is

present and stable. When the desired port is enabled and the chip is out of shutdown mode,

the I2C DDC lines can be used for communication.

Thus, as soon as the HPD detection sequence is complete, the DDC interface can be

readily used. There is no delay between the HPD detection and I2C DDC interface to be

ready.

Table 5.

Bias parameter

Parameter

Min

Typ

Max

Unit

Bandgap voltage

1.2

STDVE001A Datasheet(PDF) 18 Page - STMicroelectronics

STDVE001A Datasheet(HTML) 18 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

Datasheet Download

Link URL