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DVIULC6-2P6 Datasheet(PDF) 8 Page - STMicroelectronics

Part # DVIULC6-2P6
Description  Ultra low capacitance ESD protection
PDF  17 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

DVIULC6-2P6 Datasheet(HTML) 8 Page - STMicroelectronics

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Technical information
DVIULC6-2x6
8/17
Figure 16.
IESD behavior: parasitic phenomena due to unsuitable layout
Figure 17.
ESD behavior - measurement conditions
Figure 18.
Remaining voltage after the
DVIULC6-2M6 during
positive ESD surge
Figure 19.
Remaining voltage after the
DVIULC6-2M6 during
negative ESD surge
V
BUS
Data line
V
CL
L
VBUS
L
I/O
L
GND
V
TRANSIL
ESD surge
on data line
V
F
dt
di
L
I/O
dt
di
L
I/O
dt
di
L
GND
dt
di
L
GND
Vcc pin
I/O pin
GND pin
V
BUS
Data line
V
CL
L
VBUS
L
I/O
L
GND
V
TRANSIL
ESD surge
on data line
V
F
dt
di
L
I/O
dt
di
L
I/O
dt
di
L
GND
dt
di
L
GND
Vcc pin
I/O pin
GND pin
0
surge
dt
di
L
dt
di
L
V
V
0
surge
dt
di
L
dt
di
L
V
V
V
GND
I/O
F
CL
GND
I/O
F
TRANSIL
CL
<
-
-
-
=
>
+
+
+
=
-
+
tr=1ns
t
V
CL-
NEGATIVE
SURGE
dt
di
L
dt
di
L
GND
I/O
-
-
dt
di
L
dt
di
L
GND
I/O
-
-
-V
F
tr=1ns
t
V
CL-
NEGATIVE
SURGE
dt
di
L
dt
di
L
GND
I/O
-
-
dt
di
L
dt
di
L
GND
I/O
-
-
-V
F
V
TRANSIL +VF
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GND
I/O
+
POSITIVE
SURGE
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GND
I/O
+
dt
di
L
dt
di
L
GND
I/O
+
POSITIVE
SURGE
V
TRANSIL +VF
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GND
I/O
+
dt
di
L
dt
di
L
GND
I/O
+
POSITIVE
SURGE
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GND
I/O
+
dt
di
L
dt
di
L
GND
I/O
+
POSITIVE
SURGE
Rd.Ip
V
V
BR
TRANSIL
+
=
TEST BOARD
IN
OUT
TEST BOARD
IN
OUT
ESD SURGE
10V/Div
100ns/Div
10V/Div
100ns/Div



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