SPEAR-09-P022 datasheet(13/40 Pages) STMICROELECTRONICS

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SPEAR-09-P022

Pin description

13/40

PL_GPIO_71

I/O

Programmable logic I/O

TTL output buffer

3.3 V capable, 4 mA

TTL input buffer

3.3 V tolerant, PU

PL_GPIO_72

PL_GPIO_73

PL_GPIO_74

PL_GPIO_75

PL_GPIO_76

PL_GPIO_77

PL_GPIO_78

PL_GPIO_79

PL_GPIO_80

PL_GPIO_81

E10

PL_GPIO_82

D10

PL_GPIO_83

C10

PL_CLK_1

Programmable Logic

external clock

TTL BIDIR buffer,

3.3 V capable, 8 mA

3.3 V tolerant, PU

PL_CLK_2

PL_CLK_3

PL_CLK_4

Ethernet

GMII_TXCLK

F22

Output

Transmit clock (GMII)

TTL output buffer 3.3 V

capable, 8 mA

GMII_TXCLK125

E22

Input

Ext. clock

TTL input buffer, 3.3 V

tolerant, PD

MII_TXCLK

D22

Transmit Clock MII

TXD_0

F21

Output

Transmit data

TTL output buffer

3.3 V capable, 8 mA

TXD_1

E21

TXD_2

F20

TXD_3

E20

GMII_TXD_4

D21

I/O

TTL BIDIR buffer

3.3 V capable, 8 mA

3.3 V tolerant, PD

GMII_TXD_5

D20

GMII_TXD_6

C22

GMII_TXD_7

C21

TX_ER

D18

Output

Transmit error

TTL output buffer

3.3 V capable, 8 mA

TX_EN

D19

Transmit enable

RX_ER

C20

Input

Receive error

TTL input buffer

3.3 V tolerant, PD

RX_DV

C19

Receive data valid

RX_CLK

A22

Receive clock

RXD_0

B22

Receive data

Table 2.

Pin description by functional group (continued)

Group

Signal name

Ball

Direction

Function

Pin type

SPEAR-09-P022 Datasheet(PDF) 13 Page - STMicroelectronics

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