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7547 Datasheet(PDF) 77 Page - Renesas Technology Corp |
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7547 Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 91 page ![]() Rev.1.21 Nov 15, 2006 page 77 of 89 REJ03B0156-0121 7547 Group Switching Characteristics Table 25 Switching characteristics (1) (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted) tC(SCLK1)/2–30 tC(SCLK1)/2–30 –30 Min. Typ. Max. Symbol Parameter Limits Unit tWH(SCLK1) tWL(SCLK1) td(SCLK1–TxD1) tv(SCLK1–TxD1) tr(SCLK1) tf(SCLK1) tr(CMOS) tf(CMOS) Serial I/O1, serial I/O2 clock output “H” pulse width Serial I/O1, serial I/O2 clock output “L” pulse width Serial I/O1, serial I/O2 output delay time Serial I/O1, serial I/O2 output valid time Serial I/O1, serial I/O2 clock output rising time Serial I/O1, serial I/O2 clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) Note 1: Pin XOUT is excluded. Table 26 Switching characteristics (2) (VCC = 2.4 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted) Min. Typ. Max. Symbol Parameter Limits Unit 350 50 50 50 50 Note 1: Pin XOUT is excluded. tWH(SCLK1) tWL(SCLK1) td(SCLK1–TxD1) tv(SCLK1–TxD1) tr(SCLK1) tf(SCLK1) tr(CMOS) tf(CMOS) Serial I/O1, serial I/O2 clock output “H” pulse width Serial I/O1, serial I/O2 clock output “L” pulse width Serial I/O1, serial I/O2 output delay time Serial I/O1, serial I/O2 output valid time Serial I/O1, serial I/O2 clock output rising time Serial I/O1, serial I/O2 clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) tC(SCLK1)/2–50 tC(SCLK1)/2–50 –30 20 20 ns ns ns ns ns ns ns ns 10 10 140 30 30 30 30 ns ns ns ns ns ns ns ns Table 27 Switching characteristics (3) (VCC = 2.2 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted) Min. Typ. Max. Symbol Parameter Limits Unit 450 70 70 70 70 Note 1: Pin XOUT is excluded. Switching characteristics measurement circuit diagram / / / Measured output pin CMOS output 100 pF tWH(SCLK1) tWL(SCLK1) td(SCLK1–TxD1) tv(SCLK1–TxD1) tr(SCLK1) tf(SCLK1) tr(CMOS) tf(CMOS) Serial I/O1, serial I/O2 clock output “H” pulse width Serial I/O1, serial I/O2 clock output “L” pulse width Serial I/O1, serial I/O2 output delay time Serial I/O1, serial I/O2 output valid time Serial I/O1, serial I/O2 clock output rising time Serial I/O1, serial I/O2 clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) tC(SCLK1)/2–70 tC(SCLK1)/2–70 –30 25 25 ns ns ns ns ns ns ns ns |
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