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R5F72115D160FPV Datasheet(PDF) 581 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 581 Page - Renesas Technology Corp

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 May. 08, 2008 Page 557 of 1200
REJ09B0344-0200
10.7.10
Contention between TGR Write and Input Capture
If an input capture signal is generated in the T2 state of a TGR write cycle, the input capture
operation takes precedence and the write to TGR is not performed for channels 0 to 4. For channel
5, write to TGR is performed and the input capture signal is generated.
Figures 10.126 and 127 show the timing in this case.
Input capture
signal
Write signal
Address
TCNT
TGR write cycle
T1
T2
M
TGR
M
TGR address
P
φ
Figure 10.126 Contention between TGR Write and Input Capture (Channels 0 to 4)
Input capture
signal
Write signal
Address
TCNT
TGR write cycle
T1
T2
N
TGR
M
TGR address
P
φ
TGR write data
Figure 10.127 Contention between TGR Write and Input Capture (Channel 5)



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