R5F72115D160FPV datasheet(635/1228 Pages) RENESAS

635 / 1228 page

Section 12 Port Output Enable 2 (POE2)

Rev. 2.00 May. 08, 2008 Page 611 of 1200

REJ09B0344-0200

Table 12.2 shows output-level comparisons with pin combinations.

Table 12.2

Pin Combinations

Pin Combination

I/O

Description

PB18/TIOC3B and PB19/TIOC3D

PB4/TIOC4A and PB6/TIOC4C

PB5/TIOC4B and PB7/TIOC4D

Output

The high-current pins for the MTU2 are placed in

high-impedance state when the pins

simultaneously output an active level for one or

more cycles of the peripheral clock (P

φ). (In the

case of TOCS = 0 in timer output control register 1

(TOCR1) in the MTU2, low level when the output

level select P (OLSP) bit is 0, or high level when

the OLSP bit is 1. In the case of TOCS = 1, low

level when the OLS3N, OLS3P, OLS2N, OLS2P,

OLS1N, and OLS1P bits are 0 in TOCR2, or high

level when these bits are 1.)

This active level comparison is done when the

MTU2 output function or general output function is

selected in the pin function controller. If another

function is selected, the output level is not

checked.

Pin combinations for output comparison and high-

impedance control can be selected by POE2

registers.

PB21/TIOC3BS and PB20/TIOC3DS

PB12/TIOC4AS and PB10/TIOC4CS

PB13/TIOC4BS and PB11/TIOC4DS

Output

The high-current pins for the MTU2S are placed in

high-impedance state when the pins

simultaneously output an active level for one or

more cycles of the peripheral clock (P

φ). (In the

case of TOCS = 0 in timer output control register

1S (TOCR1S) in the MTU2S, low level when the

output level select P (OLSP) bit is 0, or high level

when the OLSP bit is 1. In the case of TOCS = 1,

low level when the OLS3N, OLS3P, OLS2N,

OLS2P, OLS1N, and OLS1P bits are 0 in

TOCR2S, or high level when these bits are 1.)

This active level comparison is done when the

MTU2S output function or general output function

is selected in the pin function controller. If another

function is selected, the output level is not

checked.

Pin combinations for output comparison and high-

impedance control can be selected by POE2

registers.

R5F72115D160FPV Datasheet(PDF) 635 Page - Renesas Technology Corp

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