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R5F72115D160FPV Datasheet(PDF) 968 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 968 Page - Renesas Technology Corp |
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968 / 1228 page ![]() Section 21 Flash Memory Rev. 2.00 May. 08, 2008 Page 944 of 1200 REJ09B0344-0200 <User MAT><On-chip RAM><User boot MAT> Procedure for switching to the user boot MAT Procedure for switching to the user MAT Procedure for switching to the user boot MAT (1) Mask interrupts. (2) Write H'AA to FMATS. (3) Execute thirty-two NOP instructions before accessing the user boot MAT. Procedure for switching to the user MAT (1) Mask interrupts. (2) Write a value other than H'AA to FMATS. (3) Execute thirty-two NOP instructions before accessing the user MAT. Figure 21.17 Switching between User MAT and User Boot MAT 21.7.2 Interrupts during Programming/Erasing (1) Download of On-Chip Program (a) VBR Setting Change Before downloading the on-chip program, VBR must be set to H'80000000. If VBR is set to a value other than H'80000000, the interrupt vector table is placed in the user MAT (FMATS is not H'AA) or the user boot MAT (FMATS is H'AA) on setting H'80000000 to VBR. When VBR setting change conflicts with interrupt occurrence, whether the vector table before or after VBR is changed is referenced may cause an error. Therefore, for cases where VBR setting change may conflict with interrupt occurrence, prepare a vector table to be referenced when VBR is H'00000000 (initial value) at the start of the user MAT or user boot MAT. (b) SCO Download Request and Interrupt Request Download of the on-chip programming/erasing program that is initiated by setting the SCO bit in FCCS to 1 generates a particular interrupt processing accompanied by MAT switchover. Operation when the SCO download request and interrupt request conflicts is described below. 1. Contention between SCO download request and interrupt request Figure 21.18 shows the timing of contention between execution of the instruction that sets the SCO bit in FCCS to 1 and interrupt acceptance. |
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