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HD6432351 Datasheet(PDF) 721 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 721 Page - Renesas Technology Corp |
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721 / 1025 page  Section 20 Power-Down Modes Rev. 3.00 Sep 15, 2006 page 687 of 988 REJ09B0330-0300 20.2 Register Descriptions 20.2.1 Standby Control Register (SBYCR) 7 SSBY 0 R/W 6 STS2 0 R/W 5 STS1 0 R/W 4 STS0 0 R/W 3 OPE 1 R/W 0 — 0 R/W 2 — 0 — 1 — 0 — Bit Initial value R/W : : : SBYCR is an 8-bit readable/writable register that performs software standby mode control. SBYCR is initialized to H'08 by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 7—Software Standby (SSBY): Specifies a transition to software standby mode. Remains set to 1 when software standby mode is released by an external interrupt, and a transition is made to normal operation. The SSBY bit should be cleared by writing 0 to it. Bit 7 SSBY Description 0 Transition to sleep mode after execution of SLEEP instruction (Initial value) 1 Transition to software standby mode after execution of SLEEP instruction |
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