H8SLASH3022 datasheet(63/712 Pages) RENESAS

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2. CPU

Rev.2.00 Mar. 22, 2007 Page 39 of 684

REJ09B0352-0200

2.6.4

Basic Instruction Formats

The H8/300H instructions consist of 2-byte (1-word) units. An instruction consists of an operation

field (OP field), a register field (r field), an effective address extension (EA field), and a condition

field (cc).

Operation Field: Indicates the function of the instruction, the addressing mode, and the operation

to be carried out on the operand. The operation field always includes the first 4 bits of the

instruction. Some instructions have two operation fields.

by 3 bits or 4 bits. Some instructions have two register fields. Some have no register field.

Effective Address Extension: Eight, 16, or 32 bits specifying immediate data, an absolute

address, or a displacement. A 24-bit address or displacement is treated as 32-bit data in which the

first 8 bits are 0 (H'00).

Condition Field: Specifies the branching condition of Bcc instructions.

Figure 2.9 shows examples of instruction formats.

NOP, RTS, etc.

EA (disp)

Operation field only

ADD.B Rn, Rm, etc.

Operation field and register fields

MOV.B @(d:16, Rn), Rm

Operation field, register fields, and effective address extension

BRA d:8

Operation field, effective address extension, and condition field

EA (disp)

Figure 2.9 Instruction Formats

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