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H8/3021 Datasheet(PDF) 361 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 361 Page - Renesas Technology Corp |
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361 / 712 page  11. Serial Communication Interface Rev.2.00 Mar. 22, 2007 Page 337 of 684 REJ09B0352-0200 11.2.3 Transmit Shift Register (TSR) TSR is an 8-bit register used to transmit serial data. Bit Read/Write 7 — 6 — 5 — 4 — 3 — 0 — 2 — 1 — The SCI loads transmit data from TDR into TSR, then transmits the data serially from the TxD pin, LSB (bit 0) first. After transmitting one data byte, the SCI automatically loads the next transmit data from TDR into TSR and starts transmitting it. If the TDRE flag is set to 1 in SSR, however, the SCI does not load the TDR contents into TSR. The CPU cannot read or write TSR directly. 11.2.4 Transmit Data Register (TDR) TDR is an 8-bit register that stores data for serial transmission. Bit Initial value Read/Write 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 0 1 R/W 2 1 R/W 1 1 R/W When the SCI detects that TSR is empty, it moves transmit data written in TDR from TDR into TSR and starts serial transmission. Continuous serial transmission is possible by writing the next transmit data in TDR during serial transmission from TSR. The CPU can always read and write TDR. TDR is initialized to H'FF by a reset and in standby mode. |
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