H8SLASH3021 datasheet(81/712 Pages) RENESAS

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3. MCU Operating Modes

Rev.2.00 Mar. 22, 2007 Page 57 of 684

REJ09B0352-0200

Section 3 MCU Operating Modes

3.1

Overview

3.1.1

Operating Mode Selection

The H8/3022 Group has five operating modes (modes 1, 3, 5 to7) that are selected by the mode

pins (MD

2 and MD0) as indicated in table 3.1. The input at these pins determines expanded mode

or single-chip mode.

Table 3.1

Operating Mode Selection

Mode Pins

Description

Operating

Mode

Address Space

Initial Bus

Mode*

On-Chip

ROM

On-Chip

RAM

—

Mode 1

Expanded mode

8 bits

Disabled

Enabled*

Mode 2

—

Mode 3

Expanded mode

8 bits

Disabled

Enabled*

Mode 4

—

Mode 5

Expanded mode

8 bits

Enabled

Enabled*

Mode 6

Expanded mode

8 bits

Enabled

Enabled*

Mode 7

Single-chip advanced

mode

—

Enabled

Enabled*

Notes: 1. If the RAM enable bit (RAME) in the system control register (SYSCR) is cleared to 0,

these addresses become external addresses.

2. In mode 7, clearing bit RAME in SYSCR to 0 and reading the on-chip RAM always

return H’FF, and write access is ignored. For details, see section 14.3, Operation.

For the address space size there are two choices: 1 Mbyte, or 16 Mbytes.

Modes 1 and 3 are on-chip ROM disable expanded modes capable of accessing external memory

and peripheral devices.

Mode 1 supports a maximum address space of 1 Mbyte. Mode 3 supports a maximum address

space of 16 Mbytes.

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