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H8/3021 Datasheet(PDF) 374 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 374 Page - Renesas Technology Corp |
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374 / 712 page ![]() 11. Serial Communication Interface Rev.2.00 Mar. 22, 2007 Page 350 of 684 REJ09B0352-0200 Bit 1—Multiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit and cannot be written. Bit 1 MPB Description 0 Multiprocessor bit value in receive data is 0* (Initial value) 1 Multiprocessor bit value in receive data is 1 Note: * If the RE bit is cleared to 0 when a multiprocessor format is selected, MPB retains its previous value. Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to transmit data when a multiprocessor format is selected for transmitting in asynchronous mode. The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not selected, or when the SCI is not transmitting. Bit 0 MPBT Description 0 Multiprocessor bit value in transmit data is 0 (Initial value) 1 Multiprocessor bit value in transmit data is 1 11.2.8 Bit Rate Register (BRR) BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in SMR that select the baud rate generator clock source, determines the serial communication bit rate. Bit Initial value Read/Write 7 1 R/W 6 1 R/W 5 1 R/W 4 1 R/W 3 1 R/W 0 1 R/W 2 1 R/W 1 1 R/W The CPU can always read and write BRR. BRR is initialized to H'FF by a reset and in standby mode. The baud rate generator is controlled separately for the individual channels, so different values may be set for each. Table 11.3 shows examples of BRR settings in asynchronous mode. Table 11.4 shows examples of BRR settings in synchronous mode. |
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