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H8/3021 Datasheet(PDF) 458 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 458 Page - Renesas Technology Corp |
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458 / 712 page  13. A/D Converter Rev.2.00 Mar. 22, 2007 Page 434 of 684 REJ09B0352-0200 Table 13.4 A/D Conversion Time (Single Mode) CKS = 0 CKS = 1 Symbol Min Typ Max Min Typ Max Synchronization delay t D 10 — 17 6 — 9 Input sampling time t SPL — 63 — — 31 — A/D conversion time t CONV 259 — 266 131 — 134 Note: Values in the table are numbers of states. 13.4.4 External Trigger Input Timing A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR, external trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin sets the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan modes, are the same as if the ADST bit had been set to 1 by software. Figure 13.6 shows the timing. φ ADTRG Internal trigger signal ADST A/D conversion Figure 13.6 External Trigger Input Timing |
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