H8SLASH3021 datasheet(589/712 Pages) RENESAS

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Appendix A. Instruction Set

Rev.2.00 Mar. 22, 2007 Page 565 of 684

REJ09B0352-0200

Condition Code

Mnemonic

Operation

DIVXU. W Rs, ERd

ERd32

÷ Rs16 →ERd32

— — (6) (7) — —

(Ed: remainder,

Rd: quotient)

(unsigned division)

DIVXS. B Rs, Rd

Rd16

÷ Rs8 → Rd16

— — (8) (7) — —

(RdH: remainder,

RdL: quotient)

(signed division)

DIVXS. W Rs, ERd

ERd32

÷ Rs16 → ERd32

— — (8) (7) — —

(Ed: remainder,

Rd: quotient)

(signed division)

CMP.B #xx:8, Rd

Rd8–#xx:8

—

CMP.B Rs, Rd

Rd8–Rs8

—

CMP.W #xx:16, Rd

Rd16–#xx:16

— (1)

CMP.W Rs, Rd

Rd16–Rs16

— (1)

CMP.L #xx:32, ERd

ERd32–#xx:32

— (2)

CMP.L ERs, ERd

ERd32–ERs32

— (2)

NEG.B Rd

0–Rd8

→ Rd8

—

NEG.W Rd

0–Rd16

→ Rd16

—

NEG.L ERd

0–ERd32

→ ERd32

—

EXTU.W Rd

→ (<bits 15 to 8>

— —0

0—

of Rd16)

EXTU.L ERd

→ (<bits 31 to 16>

— —0

0—

of Rd32)

EXTS.W Rd

(<bit 7> of Rd16)

→

2— —

—

(<bits 15 to 8> of Rd16)

EXTS.L ERd

(<bit 15> of ERd32)

→

2— —

—

(<bits 31 to 16> of

ERd32)

Addressing Mode and

Instruction Length (bytes)

No. of

States *1

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