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H8/3021 Datasheet(PDF) 676 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 676 Page - Renesas Technology Corp |
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676 / 712 page  Appendix B. Internal I/O Register Field Rev.2.00 Mar. 22, 2007 Page 652 of 684 REJ09B0352-0200 ISR—IRQ Status Register H'F6 Interrupt controller Bit Initial value Read/Write 7 — 0 R/W 6 — 0 R/W 5 IRQ5F 0 R/W 4 IRQ4F 0 R/(W)* 3 — 0 — 2 — 0 — 1 IRQ1F 0 R/(W)* 0 IRQ0F 0 R/(W)* IRQ5, IRQ4, IRQ1 and IRQ0 flags Bits 5, 4, 1 and 0 0 1 Setting and Clearing Conditions IRQ5F IRQ4F IRQ1F IRQ0F [Clearing conditions] Read IRQnF when IRQnF = 1, then write 0 in IRQnF. IRQnSC = 0, input is high, and interrupt exception handling is carried out. IRQnSC = 1 and IRQn interrupt exception handling is carried out. [Setting conditions] IRQnSC = 0 and input is low. IRQnSC = 1 and input changes from high to low. (n = 5, 4, 1 and 0) IRQn IRQn IRQn Note: Only 0 can be written to clear the flag. * |
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