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H8/3021 Datasheet(PDF) 187 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 187 Page - Renesas Technology Corp |
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187 / 712 page ![]() 7. I/O Ports Rev.2.00 Mar. 22, 2007 Page 163 of 684 REJ09B0352-0200 Port 9 Data Direction Register (P9DDR): P9DDR is an 8-bit write-only register that can select input or output for each pin in port 9. Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 P9 DDR 0 W 5 4 P9 DDR 0 W 4 3 P9 DDR 0 W 3 2 P9 DDR 0 W 2 1 P9 DDR 0 W 1 0 P9 DDR 0 W 0 Reserved bits Port 9 data direction 5 to 0 These bits select input or output for port 9 pins A pin in port 9 becomes an output pin if the corresponding P9DDR bit is set to 1, and an input pin if this bit is cleared to 0. P9DDR is a write-only register. Its value cannot be read. All bits return 1 when read. P9DDR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode it retains its previous setting. If a P9DDR bit is set to 1, the corresponding pin maintains its output state in software standby mode. Port 9 Data Register (P9DR): P9DR is an 8-bit readable/writable register that stores output data for pins P9 5 to P90. Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 P9 0 R/W 4 P9 0 R/W 4 3 P9 0 R/W 3 2 P9 0 R/W 2 1 P9 0 R/W 1 0 P9 0 R/W 0 Reserved bits Port 9 data 5 to 0 These bits store data for port 9 pins 5 When a bit in P9DDR is set to 1, if port 9 is read the value of the corresponding P9DR bit is returned. When a bit in P9DDR is cleared to 0, if port 9 is read the corresponding pin level is read. Bits 7 and 6 are reserved. They cannot be modified and are always read as 1. P9DR is initialized to H'C0 by a reset and in hardware standby mode. In software standby mode it retains its previous setting. |
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