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H8/3021 Datasheet(PDF) 258 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 258 Page - Renesas Technology Corp |
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258 / 712 page ![]() 8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 234 of 684 REJ09B0352-0200 • Output compare timing The compare match signal is generated in the last state in which TCNT and the general register match (when TCNT changes from the matching value to the next value). When the compare match signal is generated, the output value selected in TIOR is output at the output compare pin (TIOCA or TIOCB). When TCNT matches a general register, the compare match signal is not generated until the next counter clock pulse. Figure 8.22 shows the output compare timing. N + 1 N N φ TCNT input clock TCNT GR Compare match signal TIOCA, TIOCB Figure 8.22 Output Compare Timing Input Capture Function: The TCNT value can be captured into a general register when a transition occurs at an input capture/output compare pin (TIOCA or TIOCB). Capture can take place on the rising edge, falling edge, or both edges. The input capture function can be used to measure pulse width or period. • Sample setup procedure for input capture Figure 8.23 shows a sample procedure for setting up input capture. |
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