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H8/3028F Datasheet(PDF) 353 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 353 Page - Renesas Technology Corp |
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353 / 923 page ![]() Rev. 2.00, 09/03, page 323 of 890 Bit 1—Input Capture/Compare Match Flag A1 (IMFA1): This status flag indicates GRA1 compare match or input capture events. Bit 1 IMFA1 Description 0 [Clearing conditions] (Initial value) • Read IMFA1 flag when IMFA1 =1, then write 0 in IMFA1 flag • DMAC is activated by an IMIA1 interrupt 1 [Setting conditions] • 16TCNT1 = GRA1 when GRA1 functions as an output compare register • 16TCNT1 value is transferred to GRA1 by an input capture signal when GRA1 functions as an input capture register Bit 0—Input Capture/Compare Match Flag A0 (IMFA0): This status flag indicates GRA0 compare match or input capture events. Bit 0 IMFA0 Description 0 [Clearing conditions] (Initial value) • Read IMFA0 flag when IMFA0 =1, then write 0 in IMFA0 flag • DMAC is activated by an IMIA0 interrupt 1 [Setting conditions] • 16TCNT0 = GRA0 when GRA0 functions as an output compare register • 16TCNT0 value is transferred to GRA0 by an input capture signal when GRA0 functions as an input capture register |
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