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H8/3028F Datasheet(PDF) 369 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 369 Page - Renesas Technology Corp |
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369 / 923 page  Rev. 2.00, 09/03, page 339 of 890 On-chip data bus CPU H L Bus interface H L Module data bus 16TCNTH 16TCNTL Figure 9.9 Access to Timer Counter L (CPU Reads 16TCNTL, Lower Byte) 9.3.2 8-Bit Accessible Registers The registers other than the timer counters and general registers are 8-bit registers. These registers are linked to the CPU by an internal 8-bit data bus. Figures 9.10 and 9.11 show examples of byte read and write access to a 16TCR. If a word-size data transfer instruction is executed, two byte transfers are performed. On-chip data bus CPU H L Bus interface H L Module data bus 16TCR Figure 9.10 16TCR Access (CPU Writes to 16TCR) On-chip data bus CPU H L Bus interface H L Module data bus 16TCR Figure 9.11 16TCR Access (CPU Reads 16TCR) |
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