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H8/3028F Datasheet(PDF) 380 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 380 Page - Renesas Technology Corp |
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380 / 923 page ![]() Rev. 2.00, 09/03, page 350 of 890 TIOCA2 TIOCA1 TIOCA0 GRA2 GRA1 GRB2 GRA0 GRB1 GRB0 Value of 16TCNT0 to 16TCNT2 Cleared by compare match with GRB0 H'0000 Figure 9.25 Synchronization (Example) 9.4.4 PWM Mode In PWM mode GRA and GRB are paired and a PWM waveform is output from the TIOCA pin. GRA specifies the time at which the PWM output changes to 1. GRB specifies the time at which the PWM output changes to 0. If either GRA or GRB compare match is selected as the counter clear source, a PWM waveform with a duty cycle from 0% to 100% is output at the TIOCA pin. PWM mode can be selected in all channels (0 to 2). Table 9.4 summarizes the PWM output pins and corresponding registers. If the same value is set in GRA and GRB, the output does not change when compare match occurs. Table 9.4 PWM Output Pins and Registers Channel Output Pin 1 Output 0 Output 0TIOCA0 GRA0 GRB0 1TIOCA1 GRA1 GRB1 2TIOCA2 GRA2 GRB2 |
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