H8SLASH3028F datasheet(520/923 Pages) RENESAS

520 / 923 page

Rev. 2.00, 09/03, page 490 of 890

In receiving, the SCI operates as follows:

• The SCI monitors the communication line. When it detects a start bit (0 bit), the SCI

synchronizes internally and starts receiving.

• Receive data is stored in RSR in order from LSB to MSB.

• The parity bit and stop bit are received.

After receiving these bits, the SCI carries out the following checks:

 Parity check: The number of 1s in the receive data must match the even or odd parity

setting of in the O/

E bit in SMR.

 Stop bit check: The stop bit value must be 1. If there are two stop bits, only the first is

checked.

 Status check: The RDRF flag must be 0, indicating that the receive data can be transferred

from RSR into RDR.

If these all checks pass, the RDRF flag is set to 1 and the received data is stored in RDR. If

one of the checks fails (receive error*), the SCI operates as shown in table 13.11.

Note: * When a receive error occurs, further receiving is disabled. In receiving, the RDRF flag is

not set to 1. Be sure to clear the error flags to 0.

• When the RDRF flag is set to 1, if the RIE bit is set to 1 in SCR, a receive-data-full interrupt

(RXI) is requested. If the ORER, PER, or FER flag is set to 1 and the RIE bit in SCR is also

set to 1, a receive-error interrupt (ERI) is requested.

Table 13.11 Receive Error Conditions

Receive Error Abbreviation Condition

Data Transfer

Overrun error ORER

Receiving of next data ends while

RDRF flag is still set to 1 in SSR

Receive data is not transferred

from RSR to RDR

Framing error FER

Stop bit is 0

Receive data is transferred from

RSR to RDR

Parity error

PER

Parity of received data differs from

even/odd parity setting in SMR

Receive data is transferred from

RSR to RDR

H8/3028F Datasheet(PDF) 520 Page - Renesas Technology Corp