H8SLASH3028F datasheet(624/923 Pages) RENESAS

624 / 923 page

Rev. 2.00, 09/03, page 594 of 890

Automatic SCI Bit Rate Adjustment:

Start

bit

Stop

bit

Low period (9 bits) measured (H'00 data)

High period

(1 or more bits)

When boot mode is initiated, the H8/3028F-ZTAT measures the low period of the asynchronous

SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive

format should be set as 8-bit data, 1 stop bit, no parity. The H8/3028F-ZTAT calculates the bit rate

of the transmission from the host from the measured low period, and transmits one H'00 byte to

the host to indicate the end of bit rate adjustment. The host should confirm that this adjustment

end indication (H'00) has been received normally, and transmit one H'55 byte to the H8/3028F-

ZTAT. If reception cannot be performed normally, initiate boot mode again (reset), and repeat the

above operations. Depending on the host’s transmission bit rate and the H8/3028F-ZTAT’s system

clock frequency, there will be a discrepancy between the bit rates of the host and the H8/3028F-

ZTAT. To ensure correct SCI operation, the host’s transfer bit rate should be set to 4800, 9600, or

19,200 bps*.

Table 18.7 shows typical host transfer bit rates and system clock frequencies for which automatic

adjustment of the H8/3028F-ZTAT bit rate is possible. The boot program should be executed

within this system clock range.

Table 18.7 System Clock Frequencies for which Automatic Adjustment of H8/3028F-ZTAT

Bit Rate is Possible

Host Bit Rate (bps)

System Clock Frequency for which Automatic

Adjustment of H8/3028F-ZTAT Bit Rate is Possible (MHz)

19,200

16 to 25

9,600

8 to 25

4,800

4 to 25

Note: * Only use a setting of 4800, 9600, or 19200 bps for the host’s bit rate. No other settings can

be used.

Although the H8/3028F-ZTAT may also perform automatic bit rate adjustment with bit

rate and system clock combinations other than those shown in table 18.7, a degree of error

will arise between the bit rates of the host and the H8/3028F-ZTAT, and subsequent

transfer will not be performed normally. Therefore, only a combination of bit rate and

system clock frequency within one of the ranges shown in table 18.7 can be used for boot

mode execution.

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