H8SLASH3028F datasheet(790/923 Pages) RENESAS

790 / 923 page

Rev. 2.00, 09/03, page 760 of 890

IPRA—Interrupt Priority Register A

H'EE018

Interrupt Controller

Bit

Initial value

Read/Write

R/W

IPRA7

R/W

IPRA6

R/W

IPRA5

R/W

IPRA4

R/W

IPRA3

R/W

IPRA2

R/W

IPRA1

R/W

IPRA0

Priority level A7 to A0

Priority level 0 (low priority)

Priority level 1 (high priority)

• Interrupt sources controlled by each bit

IPRA

Bit

Interrupt

source

Bit 7

IPRA7

Bit 6

IPRA6

Bit 5

IPRA5

Bit 4

IPRA4

Bit 3

IPRA3

Bit 2

IPRA2

Bit 1

IPRA1

Bit 0

IPRA0

IRQ2,

IRQ3

IRQ1

IRQ0

IRQ4,

IRQ5

WDT,

DRAM

interface,

A/D converter

16-bit

timer

channel 0

16-bit

timer

channel 1

16-bit

timer

channel 2

IPRB—Interrupt Priority Register B

H'EE019

Interrupt Controller

Bit

Initial value

Read/Write

R/W

IPRB7

R/W

IPRB6

R/W

IPRB5

R/W

—

R/W

IPRB3

R/W

IPRB2

R/W

IPRB1

R/W

—

Priority level B7 to B5, B3 to B1

Priority level 0 (low priority)

Priority level 1 (high priority)

Bit 7

IPRB7

Bit 6

IPRB6

Bit 5

IPRB5

Bit 4

—

Bit 3

IPRB3

Bit 2

IPRB2

Bit 1

IPRB1

Bit 0

—

8-bit timer

channels

0 and 1

8-bit timer

channels

2 and 3

DMAC

——

SCI

channel 0

SCI

channel 1

SCI

channel 2

• Interrupt sources controlled by each bit

IPRB

Bit

Interrupt

source

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