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H8/3028F Datasheet(PDF) 793 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 793 Page - Renesas Technology Corp |
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793 / 923 page  Rev. 2.00, 09/03, page 763 of 890 ADRCR—Address Control Register H'EE01E Bus controller 7 — 1 — Bit Initial value Read/Write 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 ADRCTL 1 R/W 2 — 1 — 1 — 1 R/W Reserved bits Reserved bit * Address control Selects address update mode 1 or address update mode 2. Description ADRCTL Address update mode 2 is selected Address update mode 1 is selected (Initial value) 0 1 Note: * Can be read or written to, but must not be cleared to 0. CSCR—Chip Select Control Register H'EE01F Bus controller Bit Initial value Read/Write 0 R/W 7 CS7E (n = 7 to 4) 0 R/W 6 CS6E 0 R/W 5 CS5E 0 R/W 4 CS4E 1 — 3 — 1 — 2 — 1 — 1 — 1 — 0 — Chip select 7 to 4 enable Description Bit n CSnE Output of chip select signal CSn is disabled (Initial value) Output of chip select signal CSn is enabled 0 1 |
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