H8SLASH3002 datasheet(75/700 Pages) RENESAS

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3.3 System Control Register (SYSCR)

SYSCR is an 8-bit register that controls the operation of the H8/3002.

Bit 7—Software Standby (SSBY): Enables transition to software standby mode. (For further

information about software standby mode see section 17, Power-Down State.)

When software standby mode is exited by an external interrupt, this bit remains set to 1. To clear

this bit, write 0.

Bit 7

SSBY

Description

SLEEP instruction causes transition to sleep mode

(Initial value)

SLEEP instruction causes transition to software standby mode

Bit

Initial value

Read/Write

SSBY

R/W

STS2

R/W

STS1

R/W

STS0

R/W

RAME

R/W

NMIEG

R/W

—

Software standby

Enables transition to software standby mode

User bit enable

Selects whether to use the UI bit in CCR

as a user bit or an interrupt mask bit

NMI edge select

Selects the valid edge

of the NMI input

Reserved bit

RAM enable

Enables or

disables

on-chip RAM

Standby timer select 2 to 0

These bits select the waiting time at

recovery from software standby mode

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