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AT89C51AC3-RDTIM Datasheet(PDF) 55 Page - ATMEL Corporation |
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AT89C51AC3-RDTIM Datasheet(HTML) 55 Page - ATMEL Corporation |
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55 / 140 page  55 AT89C51AC3 4383D–8051–02/08 Table 22. Read MOVC A, @DPTR Code Execution FCON Register ENBOOT DPTR FM1 FM0 XROW Hardware Byte External Code FMOD1 FMOD0 FPS From FM0 0 0 X 0 0000h to FFFFh OK 1 0000h to F7FF OK F800h to FFFFh Do not use this configuration 0 1 X X 0000 to 007Fh See (1) OK 1 0 X X X OK 1 1 X 0 000h to FFFFh OK 1 0000h to F7FF OK F800h to FFFFh Do not use this configuration From FM1 (ENBOOT =1 0 0 0 1 0000h to F7FF OK F800h to FFFFh OK 0 X NA 1 1 X OK 0 X NA 0 1 X 1 0000h to 007h See (2) OK 0 NA 1 0 X 1 X OK 0 NA 1 1 X 1 000h to FFFFh OK 0 NA External code : EA=0 or Code Roll Over X 0 X X X OK 1. For DPTR higher than 007Fh only lowest 7 bits are decoded, thus the behavior is the same as for addresses from 0000h to 007Fh 2. For DPTR higher than 007Fh only lowest 7 bits are decoded, thus the behavior is the same as for addresses from 0000h to 007Fh |
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