Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

A32100DX-FPLC Datasheet(PDF) 39 Page - Actel Corporation

Part # A32100DX-FPLC
Description  Integrator Series FPGAs: 1200XL and 3200DX Families
PDF  84 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

A32100DX-FPLC Datasheet(HTML) 39 Page - Actel Corporation

Back Button A32100DX-FPLC Datasheet HTML 35Page - Actel Corporation A32100DX-FPLC Datasheet HTML 36Page - Actel Corporation A32100DX-FPLC Datasheet HTML 37Page - Actel Corporation A32100DX-FPLC Datasheet HTML 38Page - Actel Corporation A32100DX-FPLC Datasheet HTML 39Page - Actel Corporation A32100DX-FPLC Datasheet HTML 40Page - Actel Corporation A32100DX-FPLC Datasheet HTML 41Page - Actel Corporation A32100DX-FPLC Datasheet HTML 42Page - Actel Corporation A32100DX-FPLC Datasheet HTML 43Page - Actel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 84 page
background image
Discontinued – v3.0
39
Integrato r Se ries F P G A s: 1200 XL and 320 0DX Fam ilies
A128 0XL Timing Cha r ac teristics (continued)
(Worst-Case Commercial Conditions VCC = 4.75 V, TJ = 70°C)
‘–2’ Speed
‘–1’ Speed
‘Std’ Speed
‘–F’ Speed
3.3V ‘Std’
Speed
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Units
TTL Output Module Timing1
tDLH
Data-to-Pad High
3.8
4.3
5.0
7.1
6.0
ns
tDHL
Data-to-Pad Low
4.1
4.6
5.4
7.7
6.5
ns
tENZH
Enable-Pad Z to High
3.8
4.3
5.0
7.1
6.0
ns
tENZL
Enable-Pad Z to Low
4.1
4.7
5.5
7.7
6.6
ns
tENHZ
Enable-Pad High to Z
5.4
6.1
7.2
10.3
8.6
ns
tENLZ
Enable-Pad Low to Z
5.4
6.1
7.2
10.3
8.6
ns
tGLH
G-to-Pad High
4.2
4.8
5.6
8.0
6.7
ns
tGHL
G-to-Pad Low
4.7
5.4
6.3
9.0
7.6
ns
tLCO
I/O Latch Clock-Out (Pad-to-Pad),
64 Clock Loading
9.8
11.0
13.1
18.7
15.7
ns
tACO
Array Clock-Out (Pad-to-Pad),
64 Clock Loading
13.9
15.7
18.5
26.4
22.2
ns
dTLH
Capacitive Loading, Low to High
0.04
0.04
0.05
0.06
0.06
ns/pF
dTHL
Capacitive Loading, High to Low
0.05
0.06
0.07
0.08
0.08
ns/pF
CMOS Output Module Timing1
tDLH
Data-to-Pad High
4.8
5.4
6.4
9.1
7.7
ns
tDHL
Data-to-Pad Low
3.4
3.8
4.5
6.4
5.4
ns
tENZH
Enable-Pad Z to High
3.8
4.3
5.0
7.1
6.0
ns
tENZL
Enable-Pad Z to Low
4.1
4.7
5.5
7.9
6.6
ns
tENHZ
Enable-Pad High to Z
5.4
6.1
7.2
10.3
8.6
ns
tENLZ
Enable-Pad Low to Z
5.4
6.1
7.2
10.3
8.6
ns
tGLH
G-to-Pad High
4.2
4.8
5.6
8.0
6.7
ns
tGHL
G-to-Pad Low
4.7
5.4
6.3
9.0
7.6
ns
tLCO
I/O Latch Clock-Out (Pad-to-Pad),
64 Clock Loading
11.6
13.0
15.5
22.2
18.6
ns
tACO
Array Clock-Out (Pad-to-Pad),
64 Clock Loading
16.4
18.5
21.8
31.2
26.2
ns
dTLH
Capacitive Loading, Low to High
0.05
0.06
0.07
0.08
0.08
ns/pF
dTHL
Capacitive Loading, High to Low
0.05
0.05
0.06
0.07
0.07
ns/pF
Note:
1.
Delays based on 35 pF loading.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com