STM32W108HB datasheet(106/179 Pages) STMICROELECTRONICS

106 / 179 page

General-purpose timers

STM32W108CB, STM32W108HB

106/179

Doc ID 16252 Rev 2

Figure 39.

Control circuit in external clock mode 2 + trigger mode

8.1.14

Timer synchronization

The two timers can be linked together internally for timer synchronization or chaining. A

timer configured in master mode can reset, start, stop or clock the counter of the other timer

configured in slave mode.

Figure 40 presents an overview of the trigger selection and the master mode selection

blocks.

Using one timer as prescaler for the other timer

For example, to configure Timer 1 to act as a prescaler for Timer 2 (see Figure 40):

●

Configure Timer 1 in master mode so that it outputs a periodic trigger signal on each

update event. Writing TIM_MMS = 010 in the TIM1_CR2 register causes a rising edge

to be output on TRGO each time an update event is generated.

●

To connect the TRGO output of Timer 1 to Timer 2, configure Timer 2 in slave mode

using ITR0 as an internal trigger. Select this through the TIM_TS bits in the

TIM2_SMCR register (writing TIM_TS = 000).

●

Put the slave mode controller in external clock mode 1 (write TIM_SMS = 111 in the

TIM2_SMCR register). This causes Timer 2 to be clocked by the rising edge of the

periodic Timer 1 trigger signal (which corresponds to the Timer 1 counter overflow).

●

Finally both timers must be enabled by setting their respective TIM_CEN bits

(TIMx_CR1 register).

Note:

If OCy is selected on Timer 1 as trigger output (TIM_MMS = 1xx), its rising edge is used to

clock the counter of Timer 2.

Figure 40.

Master/slave timer example

STM32W108HB Datasheet(PDF) 106 Page - STMicroelectronics