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STM32W108HB Datasheet(PDF) 152 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 152 Page - STMicroelectronics |
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152 / 179 page ![]() Interrupts STM32W108CB, STM32W108HB 152/179 Doc ID 16252 Rev 2 10.3.5 Top-level active interrupts register (INT_ACTIVE) Address offset: 0x0300 Reset value: 0x0000 0000 [8] INT_MACTMR: Write 1 to unpend MAC timer interrupt. (Writing 0 has no effect.) [7] INT_SEC: Write 1 to unpend security interrupt. (Writing 0 has no effect.) [6] INT_SC2: Write 1 to unpend serial controller 2 interrupt. (Writing 0 has no effect.) [5] INT_SC1: Write 1 to unpend serial controller 1 interrupt. (Writing 0 has no effect.) [4] INT_SLEEPTMR: Write 1 to unpend sleep timer interrupt. (Writing 0 has no effect.) [3] INT_BB: Write 1 to unpend baseband interrupt. (Writing 0 has no effect.) [2] INT_MGMT: Write 1 to unpend management interrupt. (Writing 0 has no effect.) [1] INT_TIM2: Write 1 to unpend timer 2 interrupt. (Writing 0 has no effect.) [0] INT_TIM1: Write 1 to unpend timer 1 interrupt. (Writing 0 has no effect.) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 INT_D EBUG rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 INT_I RQD INT_I RQC INT_I RQB INT_I RQA INT_A DC INT_M ACRX INT_M ACTX INT_M ACTM R INT_S EC INT_S C2 INT_SC 1 INT_S LEEP TMR INT_B B INT_M GMT INT_TI M2 INT_TI M1 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [16] INT_DEBUG: Debug interrupt active. [15] INT_IRQD: IRQD interrupt active. [14] INT_IRQC: IRQC interrupt active. [13] INT_IRQB: IRQB interrupt active. [12] INT_IRQA: IRQA interrupt active. [11] INT_ADC: ADC interrupt active. [10] INT_MACRX: MAC receive interrupt active. [9] INT_MACTX: MAC interrupt active. [8] INT_MACTMR: MAC timer interrupt active. [7] INT_SEC: Ssecurity interrupt active. [6] INT_SC2: Serial controller 2 interrupt active. [5] INT_SC1: Serial controller 1 interrupt active. [4] INT_SLEEPTMR: Sleep timer interrupt active. [3] INT_BB: Baseband interrupt active. |
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