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STM32W108HB Datasheet(PDF) 155 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 155 Page - STMicroelectronics |
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155 / 179 page ![]() STM32W108CB, STM32W108HB Debug support Doc ID 16252 Rev 2 155/179 11 Debug support The STM32W108 includes a standard Serial Wire and JTAG (SWJ) Interface. The SWJ is the primary debug and programming interface of the STM32W108. The SWJ gives debug tools access to the internal buses of the STM32W108, and allows for non-intrusive memory and register access as well as CPU halt-step style debugging. Therefore, any design implementing the STM32W108 should make the SWJ signals readily available. Serial Wire is an ARM® standard, bi-directional, two-wire protocol designed to replace JTAG, and provides all the normal JTAG debug and test functionality. JTAG is a standard five-wire protocol providing debug and test functionality. In addition, the two Serial Wire signals (SWDIO and SWCLK) are overlaid on two of the JTAG signals (JTMS and JTCK). This keeps the design compact and allows debug tools to switch between Serial Wire and JTAG as needed, without changing pin connections. While Serial Wire and JTAG offer the same debug and test functionality, ST recommends Serial Wire. Serial Wire uses only two pins instead of five, and offers a simple communication protocol, high performance data rates, low power, built-in error detection, and protection from glitches. The ARM® CoreSight Debug Access Port (DAP) comprises the Serial Wire and JTAG Interface (SWJ).The DAP includes two primary components: a debug port (the SWJ-DP) and an access port (the AHB-AP). The SWJ-DP provides external debug access, while the AHB-AP provides internal bus access. An external debug tool connected to the STM32W108's debug pins communicates with the SWJ-DP. The SWJ-DP then communicates with the AHB-AP. Finally, the AHB-AP communicates on the internal bus. Figure 48. SWJ block diagram Serial Wire and JTAG share five pins: ● JRST ● JTDO ● JTDI ● SWDIO/JTMS ● SWCLK/JTCK Since these pins can be repurposed, refer to Section 2: Pinout and pin description on page 17 and Section 6: General-purpose input/outputs on page 46 for complete pin descriptions and configurations. |
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