AT32AP7002_09 datasheet(32/52 Pages) ATMEL

32 / 52 page

32054FS–AVR32–09/09

AT32AP7002

7.8

Peripheral overview

7.8.1

External Bus Interface

• Optimized for Application Memory Space support

• Integrates Three External Memory Controllers:

– Static Memory Controller

– SDRAM Controller

– ECC Controller

• Additional Logic for NAND Flash/SmartMediaTM and CompactFlashTM Support

– SmartMedia support: 8-bit as well as 16-bit devices are supported

– CompactFlash support: all modes (Attribute Memory, Common Memory, I/O, True IDE) are

supported but the signals _IOIS16 (I/O and True IDE modes) and _ATA SEL (True IDE mode)

are not handled.

• Optimized External Bus:

– 16- or 32-bit Data Bus

– Up to 26-bit Address Bus, Up to 64-Mbytes Addressable

– Optimized pin multiplexing to reduce latencies on External Memories

• Up to 6 Chip Selects, Configurable Assignment:

– Static Memory Controller on NCS0

– SDRAM Controller or Static Memory Controller on NCS1

– Static Memory Controller on NCS2

– Static Memory Controller on NCS3, Optional NAND Flash/SmartMediaTM Support

– Static Memory Controller on NCS4 - NCS5, Optional CompactFlashTM Support

7.8.2

Static Memory Controller

• 6 Chip Selects Available

• 64-Mbyte Address Space per Chip Select

• 8-, 16- or 32-bit Data Bus

• Word, Halfword, Byte Transfers

• Byte Write or Byte Select Lines

• Programmable Setup, Pulse And Hold Time for Read Signals per Chip Select

• Programmable Setup, Pulse And Hold Time for Write Signals per Chip Select

• Programmable Data Float Time per Chip Select

• Compliant with LCD Module

• External Wait Request

• Automatic Switch to Slow Clock Mode

• Asynchronous Read in Page Mode Supported: Page Size Ranges from 4 to 32 Bytes

7.8.3

SDRAM Controller

• Numerous Configurations Supported

– 2K, 4K, 8K Row Address Memory Parts

– SDRAM with Two or Four Internal Banks

– SDRAM with 16- or 32-bit Data Path

• Programming Facilities

– Word, Half-word, Byte Access

– Automatic Page Break When Memory Boundary Has Been Reached

– Multibank Ping-pong Access

– Timing Parameters Specified by Software

– Automatic Refresh Operation, Refresh Rate is Programmable

AT32AP7002 Datasheet(PDF) 32 Page - ATMEL Corporation

AT32AP7002 Datasheet(HTML) 32 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL