AT32AP7002_09 datasheet(33/52 Pages) ATMEL

33 / 52 page

32054FS–AVR32–09/09

AT32AP7002

• Energy-saving Capabilities

– Self-refresh, Power-down and Deep Power Modes Supported

– Supports Mobile SDRAM Devices

• Error Detection

– Refresh Error Interrupt

• SDRAM Power-up Initialization by Software

• CAS Latency of 1, 2, 3 Supported

• Auto Precharge Command Not Used

7.8.4

Error Corrected Code Controller

• Hardware Error Corrected Code (ECC) Generation

– Detection and Correction by Software

• Supports NAND Flash and SmartMedia™ Devices with 8- or 16-bit Data Path.

• Supports NAND Flash/SmartMedia with Page Sizes of 528, 1056, 2112 and 4224 Bytes, Specified

by Software

7.8.5

Serial Peripheral Interface

• Supports communication with serial external devices

– Four chip selects with external decoder support allow communication with up to 15

peripherals

– Serial memories, such as DataFlash™ and 3-wire EEPROMs

– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and Sensors

– External co-processors

• Master or slave serial peripheral bus interface

– 8- to 16-bit programmable data length per chip select

– Programmable phase and polarity per chip select

– Programmable transfer delays between consecutive transfers and between clock and data

per chip select

– Programmable delay between consecutive transfers

– Selectable mode fault detection

• Very fast transfers supported

– Transfers with baud rates up to MCK

– The chip select line may be left active to speed up transfers on the same device

7.8.6

Two-wire Interface

• Compatibility with standard two-wire serial memory

• One, two or three bytes for slave address

• Sequential read/write operations

AT32AP7002 Datasheet(PDF) 33 Page - ATMEL Corporation