AT32AP7002_09 datasheet(45/52 Pages) ATMEL

45 / 52 page

32054FS–AVR32–09/09

AT32AP7002

TCMR.START = Receive start

RFMR.FSOS = None (Input)

RCMR.START = any on RF (edge/level)

Fix/Workaround

None.

30. USART - TXD signal is floating in Modem and Hardware Handshaking mode

The TXD signal is floating in Modem and Hardware Handshaking mode, but should be

pulled up.

Fix/Workaround

Enable pullup on this line in the PIO.

31. PWM - Impossible to update a period equal to 0 by using the CUPD register

It is impossible to UPDATE a period equal to 0 by the using of the UPDATE register

(CUPD).

Fix/Workaround

To update a period equal to 0, write directly to the CPRD register.

32. WDT Clear is blocked after WDT Reset

A watchdog timer event will, after reset, block writes to the WDT_CLEAR register, prevent-

ing the program to clear the next Watchdog Timer Reset.

Fix/Workaround

If the RTC is not used a write to AVR32_RTC.ctrl.pclr = 1, instead of writing to

AVR32_WDT.clr, will reset the prescaler and thus prevent the watchdog event from happen-

ing. This will render the RTC useless, but prevents WDT reset because the RTC and WDT

share the same prescaler. Another sideeffect of this is that the watchdog timeout period will

be half the expected timeout period.

If the RTC is used one can disable the Watchdog Timer (WDT) after a WDT reset has

occured. This will prevent the WDT resetting the system. To make the WDT functional again

a hard reset (power on reset or RESET_N) must be applied. If you still want to use the WDT

after a WDT reset a small code can b e inse rt ed at the st a r t u p checking the

AVR32_PM.rcause register for WDT reset and use a GPIO pin to reset the system. This

method requires that one of the GPIO pins are available and connected externally to the

RESET_N pin. After the GPIO pin has pulled down the reset line the GPIO will be reset and

leave the pin tristated with pullup.

33. USART - The DCD Signal is active high from the USART, but should be active low

The DCD signal is active high from the USART, but should be active low.

Fix/Workaround

An inverter should be added on this line on the PCB.

34. MCI Transmit Data Register (TDR) FIFO corruption

If the number of bytes to be transmitted by the MCI is not a multiple of 4, the Transmit Data

mit data is written to the TDR as 32-bit values.

Fix/Workaround

AT32AP7002 Datasheet(PDF) 45 Page - ATMEL Corporation

AT32AP7002 Datasheet(HTML) 45 Page - ATMEL Corporation

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