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73S1210F-68IM/F/P Datasheet(PDF) 43 Page - Teridian Semiconductor Corporation |
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73S1210F-68IM/F/P Datasheet(HTML) 43 Page - Teridian Semiconductor Corporation |
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43 / 126 page ![]() DS_1210F_001 73S1210F Data Sheet Rev. 1.4 43 • Mode 3 The only difference between Mode 2 and Mode 3 is that in Mode 3 either internal baud rate generator or timer 1 can be use to specify baud rate. The S0BUF register is used to read/write data to/from the serial 0 interface. Serial Interface 0 Control Register (S0CON): 0x9B 0x00 Transmit and receive data are transferred via this register. Table 38: The S0CON Register MSB LSB SM0 SM1 SM20 REN0 TB80 RB80 TI0 RI0 Bit Symbol Function S0CON.7 SM0 These two bits set the UART0 mode: Mode Description SM0 SM1 0 N/A 0 0 1 8-bit UART 0 1 2 9-bit UART 1 0 3 9-bit UART 1 1 S0CON.6 SM1 S0CON.5 SM20 Enables the inter-processor communication feature. S0CON.4 REN0 If set, enables serial reception. Cleared by software to disable reception. S0CON.3 TB80 The 9th transmitted data bit in Modes 2 and 3. Set or cleared by the MPU, depending on the function it performs (parity check, multiprocessor communication etc.). S0CON.2 RB80 In Modes 2 and 3 it is the 9th data bit received. In Mode 1, if SM20 is 0, RB80 is the stop bit. In Mode 0 this bit is not used. Must be cleared by software. S0CON.1 TI0 Transmit interrupt flag, set by hardware after completion of a serial transfer. Must be cleared by software. S0CON.0 RI0 Receive interrupt flag, set by hardware after completion of a serial reception. Must be cleared by software. |
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