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dsPIC33FJ32GS608 Datasheet(PDF) 312 Page - Microchip Technology |
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dsPIC33FJ32GS608 Datasheet(HTML) 312 Page - Microchip Technology |
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312 / 416 page ![]() dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 DS70591B-page 312 Preliminary 2009 Microchip Technology Inc. bit 3 Unimplemented: Read as ‘0’ bit 2-0 ADCS<2:0>: A/D Conversion Clock Divider Select bits(1) 111 = FADC/8 110 = FADC/7 101 = FADC/6 100 = FADC/5 011 = FADC/4 (default) 010 = FADC/3 001 = FADC/2 000 = FADC/1 REGISTER 22-1: ADCON: A/D CONTROL REGISTER (CONTINUED) Note 1: This control bit can only be changed while the ADC is disabled (ADON = 0). |
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