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dsPIC33FJ32GS608 Datasheet(PDF) 314 Page - Microchip Technology |
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dsPIC33FJ32GS608 Datasheet(HTML) 314 Page - Microchip Technology |
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314 / 416 page ![]() dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 DS70591B-page 314 Preliminary 2009 Microchip Technology Inc. REGISTER 22-3: ADBASE: A/D BASE REGISTER(1,2) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 ADBASE<15:8> bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 ADBASE<7:1> — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-1 ADBASE<15:1>: This register contains the base address of the user’s ADC Interrupt Service Routine jump table. This register, when read, contains the sum of the ADBASE register contents and the encoded value of the PxRDY Status bits. The encoder logic provides the bit number of the highest priority PxRDY bits where P0RDY is the highest priority, and P6RDY is the lowest priority. bit 0 Unimplemented: Read as ‘0’ Note 1: The encoding results are shifted left two bits so bits 1-0 of the result are always zero. 2: As an alternative to using the ADBASE Register, the ADCP0-ADCP12 ADC Pair Conversion Complete Interrupts can be used to invoke A to D conversion completion routines for individual ADC input pairs. |
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