DSPIC33FJ32GS608 datasheet(338/416 Pages) MICROCHIP

338 / 416 page

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

DS70591B-page 338

Preliminary

 2009 Microchip Technology Inc.

FIGURE 24-2:

WDT BLOCK DIAGRAM

24.5

JTAG Interface

dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610 devices implement

a JTAG interface, which supports boundary scan

device testing, as well as in-circuit programming.

Detailed information on this interface will be provided in

future revisions of the document.

24.6

In-Circuit Serial Programming

dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610 family digital signal

controllers can be serially programmed while in the end

application circuit. This is done with two lines for clock

and data and three other lines for power, ground and

the programming sequence. Serial programming

allows customers to manufacture boards with

unprogrammed devices and then program the digital

signal controller just before shipping the product. Serial

programming also allows the most recent firmware or a

custom firmware to be programmed. Refer to the

“dsPIC33F/PIC24H Flash Programming Specification”

(DS70152)

for

details

about

In-Circuit

Serial

Programming (ICSP).

Any of the three pairs of programming clock/data pins

can be used:

• PGEC1 and PGED1

• PGEC2 and PGED2

• PGEC3 and PGED3

24.7

In-Circuit Debugger

When MPLAB® ICD 2 is selected as a debugger, the in-

circuit debugging functionality is enabled. This function

allows simple debugging functions when used with

MPLAB IDE. Debugging functionality is controlled

through the EMUCx (Emulation/Debug Clock) and

EMUDx (Emulation/Debug Data) pin functions.

Any of the three pairs of debugging clock/data pins can

be used:

• PGEC1 and PGED1

• PGEC2 and PGED2

• PGEC3 and PGED3

To use the in-circuit debugger function of the device,

the design must implement ICSP connections to

MCLR, VDD, VSS, PGC, PGD and the EMUDx/EMUCx

pin pair. In addition, when the feature is enabled, some

of the resources are not available for general use.

These resources include the first 80 bytes of data RAM

and two I/O pins.

All Device Resets

Transition to New Clock Source

Exit Sleep or Idle Mode

PWRSAV Instruction

CLRWDT Instruction

WDTPRE

WDTPOST<3:0>

Watchdog Timer

Prescaler

(Divide by N1)

Postscaler

(Divide by N2)

Sleep/Idle

WDT

WDT Window Select

WINDIS

WDT

CLRWDT Instruction

SWDTEN

FWDTEN

LPRC Clock

Wake-up

Reset

dsPIC33FJ32GS608 Datasheet(PDF) 338 Page - Microchip Technology

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