Preliminary and proprietary Information of YAMAR Electronics Ltd. Subject to change without notice.

© 2010 Yamar Electronics Ltd.

6

DS-SIG61 R0.932

R10

100K

C2

*pF

R6

100K

C5

1n

R11

NC

R2

1K

F1

SFE5.5

3

1

R8

100K

C3

1n

C1

*pF

Vdd

R7

100K

C6

10n

C4

560p/200V

X1

4MHz

R1

1K

Vdd

Vdd

VCC

Vdd

Vdd

InterHope

AutoSleep

J1

Inputs port

1

2

3

4

5

6

7

8

9

10

SIG61

DTxO

45

In2_HDI

42

HDO

35

In3_HDC

41

F1nF0

38

InterHope

3

Test

15

Gnd

46

TxO

8

Gnd

6

BitRate0

1

RxIn

10

Vdd

4

RxN

9

In0

47

In1

44

In6

37

In4

40

In5

39

In7

36

Id0

16

Id1

14

Id2

13

Id3

12

Vdd

34

Gnd

33

Mode2_LBD

48

Vdd

43

NC

5

BitRate1

2

Gnd

7

Vdd

11

EXP

EXP

Vdd

D2

BAS70-04

R16

680

D1

BAS70-04

J2

Outputs port

Vdd

AC/DC BUS

C9 1n

Vdd

C10

100p

C7

1nF

C8

1nF

R13

1K

R12

1K

Id2

Id3

F1nF0

Id0

AutoFreqChange

R3

10

BitRate0

BitRate1

Id1

F0

SFE6.5

3

1

R5

100K

Figure 3.3 – Typical SIG61 dual channel circuit

Note: All the signals indicated in red, should be tied either to Gnd, or Vdd, according to the desired

mode of operation.