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IP4778CZ38/V Datasheet(PDF) 17 Page - NXP Semiconductors |
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IP4778CZ38/V Datasheet(HTML) 17 Page - NXP Semiconductors |
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17 / 26 page ![]() IP4778CZ38_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 12 February 2009 17 of 26 NXP Semiconductors IP4778CZ38 HDMI ESD protection, DDC buffering and hot plug control 10.7 Application schematic Figure 14 shows a typical application where the IP4778CZ38 provides a simplified interface to an HDMI port. This application requires only a few external components to adapt the HDMI port to the parameters of the HDMI receiver device or HDMI multiplexer. Fig 14. Schematic of IP4778CZ38 application 001aah830 1.5 k Ω 1.5 k Ω 100 k Ω 100 Ω 100 Ω 47 k Ω 1 µF 1 k Ω 47 k Ω 27 k Ω BAV40 1 2 ENABLE u/c: >3V3 = enabled 0V = disabled 4 TMDS_D2+ 5 TMDS_D2 − 7 TMDS_D1+ 8 TMDS_D1 − 10 IP4778CZ38 EDID TMDS_D0+ 11 12 TMDS_D0 − 13 TMDS_CLK+ 14 TMDS_CLK − 16 CEC_IN 17 DDC_CLK_IN 18 DDC_DAT_IN 19 37 HDMI CONNECTOR VCC(5V0) VCC(3V3) 35 34 32 31 29 28 3, 6, 9, 12, 15, 24, 27, 30, 33, 36 TMDS_D2+ TMDS_D2 − TMDS_D1+ TMDS_D1 − TMDS_D0+ TMDS_D0 − TMDS_CLK+ TMDS_CLK − CEC DDC_CLK DDC_DAT HOTPLUG_DET +5 V 26 25 23 7, 8 6 5 1, 2, 3, 4 22 21 20 HOT_PLUG_DET_IN |
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