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IP4778CZ38/V Datasheet(PDF) 10 Page - NXP Semiconductors

Part # IP4778CZ38/V
Description  HDMI ESD protection, DDC buffering and hot plug control
PDF  26 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

IP4778CZ38/V Datasheet(HTML) 10 Page - NXP Semiconductors

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IP4778CZ38_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 12 February 2009
10 of 26
NXP Semiconductors
IP4778CZ38
HDMI ESD protection, DDC buffering and hot plug control
9.
Dynamic characteristics
[1]
Typical values were measured with VCC(3V3) = 3.3 V; VCC(5V0) = 5.0 V.
[2]
Pin ENABLE should only change state when the DDC-bus is in an idle state.
Connector side: output pin HOT_PLUG_DET_OUT
ILI
input leakage current
−1
+0.1
+1
µA
Ci
input capacitance
VI = 3 V or 0 V
-
6
7
pF
Von
on-state voltage
II = 5 mA
-
400
-
mV
Table 8.
Hot Plug control circuit …continued
VCC(5V0) = 4.5 V to 5.5 V; VCC(3V3) = 2.7 V to 5.5 V; GND = 0 V; Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 9.
DDC circuits
VCC(3V3) = 2.7 V to 5.5 V; VCC(5V0) = 4.5 V to 5.5 V; GND = 0 V; Tamb =25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Board side to connector side; see Figure 4
Pins DDC_CLK_IN to DDC_CLK_OUT and DDC_DAT_IN to DDC_DAT_OUT
tPLH
LOW-to-HIGH propagation delay
[1] 150
270
300
ns
tPHL
HIGH-to-LOW propagation delay
[1] 125
210
225
ns
Pins DDC_CLK_OUT and DDC_DAT_OUT
tTLH
LOW to HIGH transition time
RL = 1.35 kΩ; CL = 50 pF
90
110
130
ns
tTHL
HIGH to LOW transition time
[1] 235ns
Connector side to board side; see Figure 5
Pins DDC_CLK_OUT to DDC_CLK_IN and DDC_DAT_OUT to DDC_DAT_IN
tPLH
LOW-to-HIGH propagation delay
90
110
130
ns
tPHL
HIGH-to-LOW propagation delay
[1] 20
30
40
ns
Pins DDC_CLK_IN and DDC_DAT_IN
tTLH
LOW to HIGH transition time
100
120
140
ns
tTHL
HIGH to LOW transition time
[1] 235ns
Enable: pin ENABLE
tsu
set-up time
pin ENABLE = HIGH before start
condition
[2] 100
-
-
ns
th
hold time
pin ENABLE = HIGH after stop
condition
[2] 100
-
-
ns



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